1. Field of the Invention
The invention relates to integrated circuits and more specifically to the making of a bias circuit that can be used to temporarily modify the access to programmable memorizing or storage cells. Such cells are used notably in the field of read-only memories organized in matrix form in which the memorizing or storage cells comprise a floating-gate transistor as a storage unit.
2. Discussion of the Related Art
Read-only memories are commonly organized in matrix form, in rows and columns. The rows are called bit rows. The columns are called word columns. The intersections of these rows and columns form storage cells whose electrical state represents an information element. Depending on the technology used, these storage cells are programmable one or more times, they can be erased individually or comprehensively etc. The programming and the erasure are operations that consist in dictating a certain voltage on these storage cells, the electrical state of these cells being modified as the case may be during these operations.
The rows and the columns of the memories are generally tested when they come off the production line. This testing is done in order to check their operation. What is done notably is to ensure that access can be had to all the storage cells of the memories and that they can be programmed and erased in such a way that there is definite knowledge, at any time, of the electrical state of the storage cells. It happens that certain columns have manufacturing defects. It may be that it is impossible to obtain access to them. It may also happen that the information elements that have to be stored therein are not reliable if, for example, their electrical state remains the same whereas it should have been modified by programming or erasure. In this case, it is preferable not to use them. The common practice, therefore, is to provide for the use of additional columns, called redundancy columns, to overcome any malfunctioning of the columns placed at the disposal of the users. If no malfunctioning is detected when the circuits come off the production line, these redundancy columns are not used.
The number of redundancy columns depends on the maximum space factor allowed, and on the probabilities of malfunctioning which depend on the technological parameters. For example, for a memory comprising 8192 columns organized in 32 blocks of 256 columns, it may be decided to add 4 redundancy columns per block. This gives, in all, 128 redundancy columns.
To make it possible effectively to replace a malfunctioning column by a redundancy column, it is necessary to provide for means to memorize the address of the malfunctioning column and to select the redundancy column when the address of the malfunctioning column is selected. Hitherto, the procedure used was to physically cut off wires, typically by means of lasers. This operation had to be done before the passivation of the memory and necessitated a return to the production line for the passivation once the replacement was done.
Now, in order to simplify the operation, programmable circuits are used for the electrical memorizing, in memorizing circuits, of the addresses of the redundancy columns.
A memorizing circuit typically comprises a floating-gate transistor used as a memorizing point. A floating-gate transistor represents one address bit. This floating-gate transistor, commonly called a fuse, is series-connected with a current source. The expression "fuse" is functional and metaphorical. It does not necessarily entail a melting of material.
Depending on its electrical state (whether or not there are electrons present at the floating gate), the fuse behaves like an open circuit or like a resistor. If it behaves like a resistor, it may be crossed by a current. On the contrary, if it behaves like an open circuit, it cannot be crossed by a current. Addresses of the redundancy columns are therefore read by means of a current detector.
In the example described here above, the addresses are encoded on 13 bits. There are therefore 1664 redundancy column address bits available in all. If a supplementary validation bit is added in order to read only the addresses corresponding to the actually used redundancy columns, it is possible to read up to 1792 bits, each one taking the form of a fuse.
To program a fuse, it is insulated from the corresponding current source. For this purpose, at least one insulation transistor is used, series-connected between this fuse and this current source. When programming is being done, the insulation transistor is cut off and no current goes from the current source to the fuse.
A storage circuit 2 of this type can be recognized in FIG. 1. This figure relates to the invention but also shows the prior art.
A floating-gate transistor 3 (fuse) whose source is connected to a ground 5 is series-connected with an N type transistor 4 whose drain is connected to a supply terminal 6 by means of a resistor 25.
The drain of the floating-gate transistor is connected to a circuit 7 enabling a voltage to be imposed.
This circuit works as follows:
in programming mode, depending on the electrical state desired, a high value (for example 10 volts) is imposed or not imposed on the drain of the floating-gate transistor in order to inject or not inject electrons into the floating gate, its control gate being connected to a ground, and the control gate of the insulation transistor being connected to the ground.
in current passage detection mode (the reading of the address bit), the N type insulation transistor is biased positively at its control gate in order to be on, the control gate of the floating-gate transistor being connected to a positive supply potential VCC given by the supply terminal. The detection is done by a circuit connected to the drain of the insulation transistor.
When the operation is in reading mode, the insulation transistor is on and a current may flow, as the case may be, depending on the electrical state of the floating-gate transistor.
The insulation transistor is used to impose a constant voltage on the drain of the floating-gate transistor to have the same reading conditions whatever the current given by the supply terminal. In this case, the current read is only a function of the threshold voltage of the floating-gate transistor, this threshold voltage varying according to the electrical state of this transistor.
To impose a constant voltage on the drain of the floating-gate transistor, a constant bias voltage is imposed on the insulation transistor. This voltage is typically twice the threshold voltage Vt of an insulation transistor (typically Vt=1V). A low bias voltage is chosen in order to limit the current produced and hence the consumption of the circuit.
This limitation therefore requires the presence of a bias circuit. This bias circuit should also be capable of giving adequate voltage in programming mode (for the connection to the ground of the control gate of the insulation transistors).
It is preferable, for reasons of speed of access time, to carry out the permanent reading of the states of the fuses (at least the states of those representing the addresses of redundancy columns used). This raises a problem of consumption. Indeed, irrespectively of the mode of operation used, the bias circuit must work. This is the case for example in a watch mode wherein the memory is supplied but not used (with no reading and no writing). This bias circuit should therefore work as little as possible. On the other hand, it should be fast during the activation of the memory (when reading and writing are possible).
A present trend is leading towards the development of integrated circuits that work with variable supply voltage values. For example, circuits are being developed that can work as well with a 3-volt supply voltage as with a 5-volt supply voltage. However, the bias circuit should be capable of giving the positive bias voltage at high speed (typically within less than 1 .mu.s). Indeed, after the voltage is turned on or after a programming phase, it may happen that it is sought to gain access to a column that proves to be malfunctioning.
There are known bias circuits that are fast and consume little power, working at 5 volts. However, these circuits are not suitable for low supply voltages (3 volts) because their build-up time in this case is far too unsatisfactory (it is greater than 1 .mu.s). The set of storage circuits may indeed be likened to a capacitor with a capacitance of some picofarads. These bias circuits are therefore not suited for variable supply voltage circuits.
The invention is aimed at proposing an integrated circuit comprising storage circuits such as those defined here above and means to give a bias voltage to the insulation transistors, these means consuming little power for supply voltages of the order of 5 volts and having a response time constant that is relatively fast for supply voltages of the order of 3 volts.